It is known in the art that certain structural defects or impurities (imperfections) can trap either electrons or holes. These imperfections, or traps, give rise to localized energy levels which lie relatively deep in the forbidden energy bandgap of the semiconductor crystal as compared with the relatively shallow levels raised by other impurities, such as donors and acceptors. A method called deep-level transient spectroscopy, or in short as DLTS method, disclosed by Lang in U.S. Pat. No. 3,859,595 and a large number of modifications of this method, as described by, for example, D. K. Schroder in Chapter 7 of "Semiconductor Material and Device Characterization," (Wiley-Interscience, New York, 1990), have been widely accepted in the art as the most accurate and sensitive methods for determining properties of these traps. In these methods, the localized traps are periodically filled with charge and emptied, and the properties of the traps are determined by analyzing the transient of some electrical property of a test structure built in the semiconductor material which transient is related to the emission of charge from the traps as the test structure restores its thermodynamical equilibrium.
In the original Lang's method, the trap properties are determined from changes in the capacitance transient of a reverse biased diode with variation of its temperature. These changes are measured by utilizing a double boxcar integrator. It is known in the art of DLTS that the trap properties can be also obtained from current, charge or voltage transients, and by utilizing for data processing other analog instruments, such as look-in amplifier or exponential (Miller) correlator. Major advantage of the analog methods for data processing is a very high signal to noise ratio (SNR) that can be obtained. Major disadvantage is the necessity to repeat the measurement in the full range of temperature variation several times with different settings of the emission rate window.
Other means for processing of the DLTS signals are numerical transient analysis methods, which are utilized after the transient signal is converted in a plurality of data points by utilizing a digitizing mechanism. This plurality of data points is recorded at a multiplicity of temperatures and only one measurement in the desired range of temperature variation suffices to determine the trap properties. Major disadvantage of the numerical data processing of DLTS transients is a reduced SNR as compared to data processing utilizing analog instruments. Another disadvantage of the numerical methods is data redundancy as discussed in for example, U.S. Pat. No. 5,521,839 to Doolittle et al. Therein, the inventors have disclosed a pseudo-logarithmic storage scheme for manipulating numerical data resulting from digitizing of capacitance or conductance DLTS transients as a means for solution of the data redundancy problem. Notwithstanding, the problem of reduced SNR in the numerical DLTS data processing remains unaddressed. For further discussions in regard to the advantages and disadvantages of utilizing analog or numerical data manipulation of DLTS transients see also P. Kolev et al., "Averaging and Recording of Digital DLTS Transient Signals," (accepted for publication in Review of Scientific Instruments, Spring 1998). Other known method for manipulating numerical transient data resulting from kinetic action in physical experiments is disclosed in U.S. Pat. No. 3,937,943 to Debrunner et al. which is advantageous to the pseudo-logarithmic storage scheme disclosed in the aforementioned U.S. Pat. No. 5,521,839. Another circuit which can be incorporated in the apparatus for performing pseudo-logarithmic time averaging is disclosed in U.S. Pat. No. 4,137,568 to Dlugos. Other known methods for numerical averaging of periodic signals are discussed by T. H. Wilmshurst in Chapter 2, "Signal Recovery from Noise in Electronic Instrumentation," Second Edition, (IOP Publishing, Bristol, England, 1990). For the preferred embodiment in this Patent, continuous time averaging is utilized as explained on page 27 of the aforementioned book. For further discussions in regard to the DLTS methods, see the aforementioned Chapter 7 by D. K. Schroder, and U.S. Pat. No. 4,571,541 to Ferenczi et al.
It is known in the art of DLTS, that measurements of voltage transients are easier to analyze for the reason that the volume of the region near a rectifying junction depleted from free charge carriers, or in short the space charge region, remains constant as the traps emit their charge. A well known DLTS method to obtain voltage transients is to maintain the capacitance of the test structure constant utilizing a capacitance sensor and a feedback circuit, as revealed by, for example, R. Y. DeJule et al., "Constant Capacitance DLTS Circuit for Measuring High Purity Semiconductors," Solid-State Electronics, Vol. 28, page 639 (June 1985). For previous art and for state of the art of constructing the feedback circuit used in this method see J. J. Shiau et al., "A Method to Improve the Speed and Sensitivity of Constant-Capacitance Voltage Transient Measurements," Solid-State Electronics, Vol. 30, page 513 (May 1987) and P. Kolev, "An Improved Feedback Circuit for Constant-Capacitance Voltage Transient Measurements," Solid-State Electronics, Vol. 35, page 387 (March 1992). The advantages of maintaining a constant capacitance, and thereof a constant width of a depleted space charge region within the device under test during measurements of semiconductor devices are also known in other method for measurement of semiconductor materials disclosed in U.S. Pat. No. 5,523,700 to Williams et al.
Field-effect transistors, or in short FETs, are known to be the principal devices in the electronic manufacturing. With the shrinkage of the FETs to submicron size, standard DLTS methods which analyzes capacitance transients become impractical and measurements of current or conductance (inverse of resistance) transients are more convenient. Disadvantage of these methods is the necessity to determine the mobility of the free charge carriers in the FET for the entire range of temperatures utilized for DLTS measurements. A new method advantageously to carry out DLTS measurements of submicron scale FETs without the need to determine the mobility of the free charge carriers was revealed by P. Kolev et al., "Constant-Resistance Deep-Level Transient Spectroscopy in Submicron Metal-Oxide-Semiconductor Field-Effect Transistors," Journal of Applied Physics, Vol. 83, page 820 (January 1998). This method analyses the voltage transients utilized for compensation of the changes in the threshold or pinch-off voltage as the traps emit the trapped charge. These voltage transients are obtained from an apparatus that maintains constant resistance between the source and drain of the FET under test. Thereof, the method is named as constant-resistance DLTS, or in short CR-DLTS. Similarly to the constant-capacitance DLTS, or in short the CC-DLTS method, the new method maintains a constant volume of the space charge region, whereas CR-DLTS is based on different physical mechanism as compared to the CC-DLTS.
The principal objective of the present invention is to provide means for improved measurement of traps in the body or on the active surface of field-effect transistors. Another objective of the present invention is to provide means for numerical manipulation of digitized DLTS transients by which an increased signal to noise ratio and higher sensitivity can be obtained with respect to the numerical manipulations utilized heretofore in DLTS systems. A further objective of the present invention is to disclose comparatively simple apparatus for carrying out these methods.